In a wire bond integrated circuit 14, the bonding pads 22 are located at the peripheral edges of the chip 14, as depicted in FIG. 1. The bonding pads 22 typically include pads for power connections (power), ground connections (ground), and signal connections. The integrated circuit 14 is typically mounted to a package substrate 12, and wire bond connections are formed between the integrated circuit 14 and the package substrate 12. Thus, the package substrate 12 also has bonding structures 24, to which wire bonds are made. The bonding wires from the power and ground connections on the integrated circuit 14 are typically made to power rings 16 and ground rings 18 that circumnavigate the portion of the package substrate 12 in which the integrated circuit 14 is mounted, called the die attach pad 20.
As the term is used herein, “integrated circuit” includes devices such as those formed on monolithic semiconducting substrates, such as those formed of group IV materials like silicon or germanium, or group III-V compounds like gallium arsenide, or mixtures of such materials. The term includes all types of devices formed, such as memory and logic, and all designs of such devices, such as MOS and bipolar. The term also comprehends applications such as flat panel displays, solar cells, and charge coupled devices.
The power and ground pads 22 on the integrated circuit 14 take up a significant amount of space. In some designs that have a signal:power:ground pad ratio of 4:1:1, the power and ground pads 22 take up of a third of the bonding pads 22 on the integrated circuit 14, and thus significantly increase the size of the chip 14.
As integrated circuit technology develops, an increasing number of transistors and other devices are incorporated into increasingly smaller spaces. The increased number of devices in a given integrated circuit indicates that an increased number of bonding pads 22 are required, and thus a larger chip size is needed to accommodate the additional bonding pads 22, even when the devices themselves could be accommodated by a smaller chip size. This works against the general market pressures to continually decrease the chip size of integrated circuits 14.
The power rings 16 and ground rings 18 on the package substrate 12 and the power and ground pads 22 on the integrated circuit 14 make it very difficult to reduce the size of either the chip 14 or the package substrate 12 without venturing into many added processes in integrated circuit fabrication and package assembly, which would lead to much higher costs.
One method of reducing the space needed for the bonding pads 22 and bonding fingers 24 is to reduce the pitch between the pads 22 and reduce the pitch between the fingers 24. However, these pitches can only be reduced by so much before mechanical considerations of the bonding process and bonding wires are impacted. Another method is to switch from wire bonding packages 10 to flip-chip packages. However, flip-chip packaging is generally more expensive the wire bonding packaging.
What is needed, therefore, is a system that overcomes problems such as those described above, at least in part.